An important step in the process of integrated circuit manufacturing is the processing of the semiconductor substrate in which active devices such as transistors and capacitors that comprise the integrated circuits are formed. The semiconductor or silicon substrate must be manufactured to extremely precise specifications and quality standards. As in any manufacturing industry, minimization of defects is an important consideration. For example, because the active devices that are formed on the silicon substrate are microscopic in size, any defect in the substrate, even on the molecular level, will decrease yield and therefore increase the cost of manufacturing integrated circuits.
In the field of semiconductor substrate processing, defects in the top approximately 100 microns of thickness of a semiconductor substrate are a particular problem because that is where the active devices are formed. While a certain minimal level of defects may be acceptable in the lower portion of the substrate, a defect that has developed in the top 100 microns of the substrate is generally unacceptable.
A common defect is the formation of dislocations within the silicon substrate. A scratch on the back side of a substrate caused by the edge ring or carrier on which the substrate is held or transported can cause dislocations in the crystal lattice that can travel throughout the thickness of the substrate.
One known cause of substrate defects is friction, which causes injury to the back side or supported side of the silicon substrate in the form of scratches or gouges. Friction results from contact and relative movement between the silicon substrate and a supporting surface of a carrier of the substrate such as an edge ring. Relative movement can be caused by thermal expansion or the momentum of the substrate during acceleration or deceleration of the carrier. Sheer or normal forces on the surface of the substrate can also cause dislocations.
Dislocations resulting from friction are typically caused by microcutting, gouging, or galling, for example. These exemplary modes of causing damage to the substrate surface are typically the result of microscopic roughness of the contacting surfaces of the carrier and the substrate material. Considerable effort has been expended to control roughness and to decrease friction between the contacting surfaces.
The microscopic surface roughness on contacting surfaces can cause microcuts and protrusions that can cause gouges in the silicon substrate. Microcutting and gouging create particles that can break away from the surface of the substrate. Adhesion and shearing create microparticles that agglomerate to larger particles. Larger particles then fall to the edge ring or carrier surface and can become compacted into a substrate particle "snowball" to form micromountains that accelerate the gouging. While some level of scratching on the back side of the substrate is usually acceptable, when the scratching rises to the level of gouging, the surface defects are no longer acceptable and can cause waste in the form of defective substrate parts.
One exemplary process during which defects in a substrate can develop is Rapid Thermal Processing ("RTP"). A typical RTP chamber consists of an array of heat sources such as lamps that provide heat energy across the surface of a silicon substrate. Many types of supporting surfaces and devices are used in transporting and holding silicon substrates during processes such as RTP. The substrate is typically in the form of a disk-shaped silicon wafer, which rests on a support ring or edge ring that is typically made of silicon carbide (SiC). A typical edge ring comprises an annulus that has an inner diameter that is slightly smaller than the diameter of the silicon wafer and a step formed on the annulus which creates a circular pocket having a diameter slightly larger than the diameter of the wafer. The silicon substrate or wafer is placed on the circular pocket. Heat energy also can be provided from below the support ring that carries the substrate because the bottom side of the substrate is exposed to a heat source through an opening in the central portion of the ring. As in most steps in the manufacturing of integrated circuits and semiconductors, the process must be performed within a clean room environment.
In the case of RTP, the substrate is subjected to extreme and fast changes in temperature, which cause contraction and expansion of the substrate material and the support on which the substrate is held. The substrate material can expand and contract at a different rate than the material of the carrier on which the substrate is being held during RTP. As a result, the relative movement between the substrate and its support caused by expansion and contraction causes friction, which in turn causes scratches or gouging in the substrate. Scratching and gouges then result in dislocations within the material of the substrate. Also, the silicon substrate becomes softened in the high temperature atmosphere of RTP. Temperatures in the RTP chamber can range from 200.degree. C. to 1300.degree. C. and can change at a rate of 300.degree. C. per second. The softened material results in agglomeration of wear particles and more gouging.
Another important component of quality control in the semiconductor manufacturing process is the periodic cleaning of substrate carrier surfaces to remove microscopic wear particles that accumulate during repeated cycles of use. Currently, carrier surfaces such as those on edge rings are cleaned after a selected number of cycles of carrying wafers. The cleaning process involves time and expense, and is environmentally undesirable because of the solvents or chemicals that are currently used. The cleaning process creates inefficiency because the machine incorporating the carrier must be stopped during cleaning or for removal and replacement of the carrier surface. It is desirable to process as many substrate pieces as possible before cleaning becomes necessary.
Thus, what is needed is a novel method and apparatus for supporting a substrate during processing which reduces the build-up of wear particles and thus decreases damage to the substrate.